An exemplary embodiment of this application relates to an improved silicon waveguide for a micro-optical system. More particularly, the exemplary embodiment relates to a silicon rib waveguide having a cladding layer that reduces optical loss due to scattering from waveguide side wall roughness.
In integrated silicon photonic light circuits or micro-optical systems, a silicon waveguide structure is incorporated therein that typically comprises a rib formed in the upper single crystal silicon layer of a silicon-on-insulator chip or wafer. Light signals may be introduced into and out of the rib waveguide by coupling optical fibers thereto. The rib has a top surface and opposing parallel side walls, and a parallel trench adjacent each of the rib side walls. The rib serves to confine an optical light signal transmitted thereto, and the light signal is contained in the rib and under the trenches as it is transmitted therethrough.
One well known and effective process for producing the rib and trenches in the single crystal silicon layer is reactive ion etching (RIE). However, the RIE etch results in rib side wall roughness on the order of 1–500 nm that cause scattering of light propagating along the waveguide. This light scattering produces an optical loss measured to be approximately 1.7 dB/cm. It is highly desirable to minimize the optical insertion loss in such silicon rib waveguides.
U.S. Pat. No. 6,063,299 discloses the manufacture of a silicon rib waveguide from a silicon-on-insulator chip. This form of waveguide provides a single mode, low loss waveguide having dimensions in the order of 3 to 5 μm which can be coupled to optical fibers. The top surface of the rib waveguide is covered by a nitride buffer layer and the side walls and adjacent trough areas are clad with a thermal oxide or silicon dioxide. A light absorbing material, such as, a metallic layer may be deposited on the nitride buffer layer on the top of the rib waveguide to produce a polarizer. The use of the silicon dioxide cladding on the side walls of the waveguide reduces the index of refraction contrast from the silicon waveguide to the surrounding air by including the silicon dioxide cladding material of intermediate index. Thus, as indicated in this patent, the silicon dioxide cladding can reduce the insertion loss by 0.2 dB/cm. Although this reduction in optical loss is significant, it is the aim of the exemplary embodiment of this application to provide an even greater loss reduction. Further, while the silicon dioxide cladding layer offers improvement in optical loss for silicon rib waveguides, an oxide cladding layer will not work for micro-optical systems as a final step in the fabrication process. This is because a sacrificial layer is generally used that must be etched by hydrofluoric acid (HF) to release switches. In addition, the growth of a thermal oxide results in significant thin film stress that impacts polarization mode dispersion, as discussed in more detail later.
U.S. Pat. No. 6,510,275 discloses a micro-optoelectromechanical device with aligned structures having at least one rib waveguide formed in an upper silicon layer of the device and at least one optical fiber connection structure in the form of a V groove that is formed in the lower silicon substrate of the device. In one embodiment, the upper silicon layer is a single crystal silicon layer of a silicon-on-insulator wafer. A method of fabricating the device provides that the waveguide and V groove is defined by the same masking layer. The V groove is thus self aligned with the waveguide. When an optical fiber is fixed in the V groove, the misalignment of the coupled optical fiber and waveguide is minimized. The facet/side surface of the waveguide is left covered with a silicon nitride masking layer to serve as an anti-reflection coating, while the side walls of the rib waveguide is left bare.
U.S. Pat. No. 5,882,532 discloses a method for fabricating thin micromechanical devices in a way that is compatible with silicon wafer handling and processing for conventionally thick wafers. The method includes a fabrication wafer of single crystal silicon bonded to a handle wafer of conventional thickness to form a bonded wafer pair. The thickness of the single crystal silicon wafer may be reduced by typical micromachining and polishing processes. The fabrication wafer is etched to form a trench surrounding each of the micromechanical devices to separate them from the rest of the fabrication wafer, except for at least one tether that keeps the micromechanical devices attached to the fabrication wafer. The bonding layer is etched away to release the etched fabrication wafer from the handle wafer. The individual micromechanical devices are obtained by breaking the tethers.
Planar light circuits use photonic signals that propagate through optical waveguides in contrast to the electrical signals that propagate through wires in microelectronic integrated circuits. It is anticipated that miniature waveguides in planar light circuits of micro-optical systems will be an enabling technology to decrease the cost of optical telecommunication components through batch manufacturing and integration of functions on-chip. Accordingly, further reduction in optical loss of light propagating through silicon rib waveguides as delineated by the exemplary embodiment of this application is considered an important advance in this technology.